Debugging circuits is so hard, anything one can do to help makes sense.

I remember asking all of my provessors the same question. Which do they prefer: Verilog or VHDL? Nobody stood up for VHDL.

The high speed frme buffers on the ULX4M are all in VHDL. GPL License.

ECP5 DVI I/O can be found In the examples directory for the popular ULX3M board.  There is VHDL code for DVI out, with a Verilog wrapper. DVI out supports 24 bit 1920*1080 frames @30 FPS. The design uses the I/O blocks which were designed for controlling DDR memory using a clock source from the FPGA.

FPGA-LCD-Driver fork by Gohran Mahovlic is a VHDL library for GateMate which uses an LVDS signal to drive a TFT LCD display with a test pattern.

VHDLproc.    View      

VHDLproc is a simple command line VHDL preprocessor written in Python following the conditional compilation directives outlined in VHDL-2019, with a few extensions.


Pile of Cores.    View      

An Apache licensed VHDL library.

PoC - “Pile of Cores” provides implementations for often required hardware functions such as Arithmetic Units, Caches, Clock-Domain-Crossing Circuits, FIFOs, RAM wrappers, and I/O Controllers. The hardware modules are typically provided as VHDL or Verilog source code, so it can be easily re-used in a variety of hardware designs.

All hardware modules use a common set of VHDL packages to share new VHDL types, sub-programs and constants. Additionally, a set of simulation helper packages eases the writing of testbenches. Because PoC hosts a huge amount of IP cores, all cores are grouped into sub-namespaces to build a clear hierachy.

Various simulation and synthesis tool chains are supported to interoperate with PoC. To generalize all supported free and commercial vendor tool chains, PoC is shipped with a Python based infrastructure to offer a command line based frontend.


Open Source VHDL Group .    View      

Open Source VHDL Group is a GitHub Organization which hosts multiple recommended VHDL libraries.



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