Lattice ECP5

IcePi Zero.    View      

The IcePi Zero is an excellent example of an application specific FPGA circuit board.

The board designer wanted a board to run soft cpu cores. It has all that is needed for a soft core, the rest it leaves to the Raspberry Pi ecosystem. This makes for a small and inexpensive board. $64 = € 54 the same prices as the Olimex GateMate with 2 external RAMs, but Icepi has a lot more bang for the buck.

It has DVI out, a fast SDRAM, two USB ports for the. keyboard and mouse, an SD card reader, and a USB port to connect to the desktop. Everything else it leaves to the Raspberry Pi ecosystem, which is easy to plug into since it has the Raspberry Pi form factor. Lattice ECP5 is an older chip, it still supports 3.3V peripherals, which is perfect for interfacing to the Raspberry Pi ecosystem: no level shifters are needed.

The designer scratched his own itch, and in the process perfectly targeted the market. There are not many trained FPGA developers, but there are a lot of software developers who want to become FPGA developers. Their first project is usually a soft CPU core. So they want a board like this. I did the same thing for my master's thesis in electrical engineering. In the process I learned that soft cores on FPGAs are so much slower than dedicated chips. For the FPGA to be competitive, it needs a much more parallel application, which is why I moved to video. processing.

While the high level design is perfect, I worry was that there will be bugs in this board. This is the first board the designer built. Since it is an open source board, a lot of experts gave him advice, but still mistakes could have been made. And indeed that happened. The first batch of boards were received on December 17th, 2025, two of the pins were reversed, and on Jan 1 2026 version 1.3 of the board was released. So if you are doing mainstream soft cpu cores you should now be fine, but for people like me who are doing something non mainstream, there is still a worry that there will be problems with the details.

Because this board is so small and simple, it is easy to modify it. There is already a pull request for a variant with an Analog. to Digital Converter (ADC).

ULX3S.    View      

ULX3S has a great reputation. Since it was released in 2016, a huge IP ecosystem has developed.

It is for the educational market. It has many permipherals, and comes in three different sizes. When I first started studying FPGAS in 2022 it was the board that everyone recommended. It is still a great choice, although there are now less expensive options albeit with fewer peripherals.

Here is a page of ULX3S Links.

ULX4M.    View      

ULX4M has a Lattice ECP5 with Flash, RAM and ethernet which can plug into Raspberry Pi compute module 4 compatible base boards.

There are two versions of the ULX4M. The low cost ULX4M-LS will have SDRAM and a small FPGA. The high performance, more expensive, ULX4M-LD will have DDR3, 85K LUTs and 3.2Gps SerDes. To maximize memory bandwidth on the high performance ULX4M-LD SOM, the FPGA and high speed DDR3 SDRAM are on an expensive 6 layer circuit board.

The idea is to split the circuit board into two parts, the FPGA with memory, and a mass-produced base board. The base boards can be a Raspberry Pi 4 compute module base board such as the TOFU, or you can build an application specific base board for your needs. The initial base board reproduced the functionality of the ULX3S.

Multiple protocols including DisplayPort, multi Gbps Ethernet, PCIe, and MIPI can be supported by the four SerDes on the LD board. SerDes stands for SERializer DESerializer. SerDes takes a low speed parallel signal and serializes it into a single high speed differential pair running at up to 3.2 Gigabits per second (Gbps). That reduces the number of wires required. On Lattice ECP5, without overclocking, the internal signals are limited to 400 Mhz. Reportely with overclocking, the SerDes can reach 5Gbps on many chips. The ratio of the two speeds is called the gearing.

The differential signal has lower voltage swings then regular single ended signals. Power is proportional to the voltage swing squared, so it consumes a lot less power. It can run across twisted pairs or coaxial cable for longer distances than single ended signals. SerDes is less sensitive to noise, and generates less noise.

Low cost LS Variant

Lattice ECP5 LFE5U-12F-6BG381C

Ethernet 100Mbps: LAN8720A

32 MB SDRAM: IS42S16160G-7BL ( I could not find the link)

High Performance LD Variant

Lattice ECP5 LFE5U-85F-6BG381C Comes in multiple versions: 12, 25, 45 or 85K LUTs.

512MB DDR3: MT41K256M16TW-107

Ethernet 1Gbps: KSZ9031RNXCA

Both boards have the same FLASH chip:

W25Q128JVSIM NOR Flash spiFlash, 3V, 128M-bit, 4Kb Uniform Sector