DVI RTL Libraries

There are five parts to a DVI library.

1. Clock Generation: DVI has very specific allowed frequences. The clock generation module needs to generate a legal clock signal.
2. Timing: DVI and HDMI have very specific allowed pixel dimensions, front and back porch sizes, and durations for the horizontal and vertical sync signals. The timing module needs to generate these signals.
3. Pattern Generation: The library should generate a test pattern. People expect vertical color bars, but other test patterns work just as well.
4. TMDS Encoding. This Wikipedia page has a good description of how TMDS encodes the video signal works.
5. Simulator: In order to assist in test bench development, it is very helpful for the DVI library to also provide a cross-platform simulation environment.

Requirements

Everyone's needs are different. As an example let me give my requirements. I am looking for both Verilog and VHDL versions of the library, using a CERN permissive license, and with simulation tools running on Mac OS. I want it to work on the IcePi Zero. I like a large installed base, I am less concerned about formal verification. I prefer to avoid AI generated libraries; I do not trust them, and the IP provenance is not clearly defined. In production, I expect to only use the TMDS module.

Here are some of the options.

ULX3S DVI

The most famous DVI library for open source projects is the one used by the ULX3S community. It is heavily used, and I completely trust its maturity. It supports a wide range of monitor. sizes and a few frequencies. It is written in VHDL, and comes with a Verilog wrapper. It has a very permissive license.

Pile of Cores

Pile of Cores is a VHDL library recommended by CERN, and included in the Open Source VHDL Group Collection

Bruce Levy's "Learn FPGA"

Bruce Levy does a great job teaching FPGA technologies, assisted by MeCrisp ice author @mecrisp. Check out his HDMI repository

IcePi Zero DVI

Here is the DVI library from the Ice Pi Zero repository. It has two advantages. It is in Verilog, not VHDL, and it includes a simulator. It only supports 640 * 480. It was completely written by @cyao over the course of 7 commits. It uses an Apache license with some additional terms.

Hardware Definition Language Libraries

There are many hardware definition languages (HDLs). It is expected that many of them include DVI libraries. Which one should you choose? Well that depends. What programming languages do you know? Python is a popular langauge, and it supports MyHDL, MiGen and Amaranth libraries. Ammaranth is a fork of Migen. Of those Ammaranth is the most technically interesting, but Litex running on Migen has the largest market share and installed base.

Litex

Litex is perhaps the best known of the HDL libraries. It is based on the Migen Python HDL. Litex supports DVI. Litex generates both Verilog but not VHDL. Litex is licensed under a BSD two clause license, but I believe that you are free to release the RTL generated by Litex however you wish. The Litex board support files include the IcePi Zero.

Other Libraries

There are a number of other Verilog DVI libraries and VHDL DVI Libraries listed on Github. Too many for one person to review them all. Can you recommend any of them?

Sadly, as of June 18, 2026 searching on CodeBerg is disabled for anonymous users.

Vendor Libraries

Many fpga vendors have proprietary synthesis tools, with proprietary DVI libraries. They may be easy to use, but they are not portable to other platforms, increase vendor lock-in and should be avoided.

And the winner is

I am not sure. I thought it would be an HDL which generated both Verilog and VHDL. I considered Litex, but it only generates Verilog, not VHDL. Currently my first choice is the Bruce Levy version for Verilog and a separate VHDL timing module from the ULX3S DVI library. My second choice for Verilog is to use Litex. What is your advice?

Hardware Solutions

There are also hardware solutions for converting parallel signals to DVI output.

Authorship

This page was written by a human, and critiqued by two AIs.