Protocol Bridges
Here are some of the more important protocol bridge solutions for video processing.
This wiki covered 11 different protocols used in video applications. If part of the video pipeline uses one protocol, and another part uses another protocol, there are protocol bridges to convert between the two protocols. Basic bridge chips do a single function, so they are comparatively easy to use, and reasonably priced. Advanced bridge chips support multiple video pipeline functions and so are more expensive and more complex.
9.1 Microcontroller Bridges
Microcontrollers can be used as a bridge between a MIPI-CSI camera and an FPGA, or between an FPGA and a display. This involved CDC.
Clock Domain Crossing (CDC) occurs when connecting a microcontroller to an FPGA. CDC happens when the clocks are driven by different oscillators, have different frequencies, or have different phases. CDC is a problem because digital registers have setup and hold time requirements. If data changes too close to the clock edge, these timing requirements can be violated. This can cause metastability, a state where the output is unstable and can oscillate or settle to an incorrect value. MCUs have to handle CDC correctly when receiving SPI and other protocols. There is open source Verilog for CDC using FIFO queues. The GateMate FPGA includes a hardcore asynchronous FIFO controller for CDC applications.
Raspberry Pi Zero has USB HighSpeed host, a MIPI-CSI hard core, 32 bit wide Programmable Input and Output (PIO) with Direct Memory Access (DMA) and H.264 compression and decompression. The $10 Raspberry Pi Zero (one core) or the $15 Raspberry Pi Zero 2W (four cores, Bluetooth and WiFi) can bridge MIPI to an FPGA. The camera video can be displayed on the screen [10] and the screen can actually be a 24 bit + controls Display Parallel Interface [11] driving an FPGA. This page explains how to do the wiring [9]. At 60Mhz, the display would be 1 MegaPixel. Maybe as much as a 2 MegaPixel display is possible.
The other Microcontrollers listed below can probably also work as a MIPI bridge, maybe using less power.
CH32H417 is about to be released (August 2025). It supports 8/10/12 bit DVP in or out at 150 Mhz. That is 2.5 Mpixels. It also has USB C host and device running at 5Gbits/s. It supports SerDes (1,5 Gbits/s) It should run the real time Zephyr OS. The combination of USB 3 and DVP makes it a good bridge chip.
ESP32-S3 supports USB2.0 and has 8 bit wide DVP camera data. 24 bit image require multiple clock cycles to transmit.
ESP-P4 supports USB 2.0, MIPI-CSI in and MIPI-DSI and DPI out. Its Image Signal Processor (ISP) providing bad pixel, decimation, black level, exposure, de-mosaic, column conversion, contrast, crop, downsize, ROI, gamma, YUV convention, pixel packer, H.264 video encoding.
9.2 USB Bridges
The first thing every engineer wants is to display the image on his desktop. Then he can zoom in on it, save it, or show it to others in a Zoom meeting.
EZ-USB™ FX3 ($25-40 chip, $79 board) made by the Taiwanese company Infineon provide a bridge between parallel RGB and USB-3 host computers. The RGB interface looks very easy to use and is well documented. Up to 150Mhz DDR. The FX5 also supports 1/2/4/8/16 channel LVDS at rates of up to 1.25Gbits/s per lane.
FT600Q-B, FT601Q-B, and FT602Q-B ($8.50), from a British company FTDI, connect USB-3 to single ended wires using a FIFO protocol. FT600 has a 16 bits wide data path. FT601 and FR602 are 32 bits wide. The 602 version supports UVC over USB, but only send YUV422. Different versions have 1/2/4 channels. The boards cost from $66 to $74.
FTDI FT232 family provides an interface between USB 2.0, and 1/2/4/8 bit parallel single ended wires in FIFO mode. They also support SPI, UART and I2C protocols. There are versions for 1/2/4 channels, and for power flowing to the board, or in either direction. They cost $38 to $42.
Sonic SN9C291B is a Taiwanese webcam chip. It bridges a 10 bit parallel DVP to USB 2.0 high speed and full speed. To enable useable video across USB 2.0, it supports both M-JPEG and H.264 video compression.
CH569/CH565 is a Chinese RISC-V microcontroller, but the target market is bridging. It supports USB 3 host, device and HUB, SerDes at 1.25 Gbits/s, CDC, DVP with 2 frame buffers at 8/10/12-bit data width @120Mhz, or 8/16/32 bit HSPI. $35 board. Sadly the Discord server and Open Source repositories are dead, maybe because the data sheets lack crucial details. This is a common problem with Chinese products.
OmniVision, a Chinese company produces many chips which can bridge between MIPI, DVP and USB. Two chips can also merge multiple MIPI camera inputs into a single MIPI output data stream.
TinyCLUNX SOM uses a Lattice NX-33 FPGA which includes both a MIPI and USB 3 device hard cores, so it can be used to bridge between MIPI and USB-3 while also doing custom pipeline operations.
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