LVDS and SubLVDS
Low Voltage Differential Signalling (LVDS) and Sub LVDS require less power than single ended signalling.
Low Voltage Differential Signaling (LVDS) is a technical standard for differential signaling. LVDS uses totem-pole drivers. The differential voltage is only 350mV. Power is proportional to the square of the voltage change, so LVDS consumes roughly 1/10 as much power as a 2.5V RS-422 signal [17]. LVDS is supported by GateMate, Lattice ECP5, and NX17/33/40 FPGAs.
Confusingly, LVDS refers to both the two wire technology and to a camera protocol based on LVDS.
Sub Low Voltage Differential Signaling (Sub LVDS). Compared to LVDS, subLVDS runs with lower maximum voltages (1.8V), with smaller voltage swings (150mV), over shorter distances and with less power consumption. SubLVDS is used by some of the Sony cameras. Any FPGA which can receive LVDS, can receive subLVDS by providing a smaller resistor across the receiving pair of wires. Ice40 FPGAs can support LVDS and subLVDS [5] with a few extra resistors.
CameraLink by National Semiconductor sends camera data over LVDS.
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