Image Sensor Communication Protocols

I2C is a serial (1 data bit wide) communications protocol.

Serial Camera Control Bus (SCCB) runs on top of I2C and is used for controlling cameras. It is the OmniVision-specific term for standard I2C.

MIPI-CSI Camera Command Set (CCS) is a simple scheme for configuring registers over an I2C bus, supporting various register address sizes.

Serial Peripheral Interface Protocol (SPI) is a parallel interface. It can be 1,2,4 or 8 bits wide. FPGAs use SPI for external Flash Memory and often external RAM access. The Himax cameras can be controlled using either SPI or I2C. In some cameras, images can be transmitted over SPI, albeit slowly. The SPI protocol is not ideal for video as it lacks dedicated lines for essential timing signals like Vertical Sync (VSync) and Horizontal Sync (VSync).

Digital Video Port (DVP), also known as Camera Interface (CAMIF) or Camera Parallel Port, is a parallel interface using single ended wires. It should not be confused with the older Silicon Graphics Digital Video Port standard [12], which uses differential signaling. The modern meaning for DVP originated with Omnivision, but is now widely used by other vendors. Different DVP versions can have different bit widths, color spaces, colors transmitted per clock, and signal polarity. While many DVP cameras have a limited bit depth, there are 24 bit DVP cameras. There will be a lot of wires to connect, which may require a more expensive board. Additional wires may be needed to control the camera using an SPI, I2C or SCCB interface. The longer the wires are the lower the maximum frequency. At 100 Mhz, they can provide up to 1.66 Mpixels @60FPS.

DVP is considered a poorer cousin to MIPI (described later). But it has three advantages over MIPI.

1. All FPGAs support DVP.

2. DVP can have greater bandwidth than Lattice NX with MIPI hard cores.

3. DVP runs at much lower frequencies than MIPI, so it is possible to do debugging using less expensive logic analyzers.

4. DVP has no licensing fees.

Differential Signaling uses 2 wires carrying complementary voltages. MIPI, USB, HDMI and DVI all use it. The receiver detects the difference of the two voltages. Compared to DVP, differential signaling uses a smaller voltages swing, consumes less power, has better noise immunity, can reach higher frequencies, and can travel further. Here are some of the differential signaling standards used in cameras.

Low Voltage Differential Signaling (LVDS) is a technical standard for differential signaling. LVDS uses totem-pole drivers. The differential voltage is only 350mV. Power is proportional to the square of the voltage change, so LVDS consumes roughly 1/10 as much power as a 2.5V RS-422 signal [17]. LVDS is supported by GateMate, Lattice ECP5, and NX17/33/40 FPGAs.

Confusingly, LVDS refers to both the two wire technology and to a camera protocol based on LVDS.

Sub Low Voltage Differential Signaling (Sub LVDS). Compared to LVDS, subLVDS runs with lower maximum voltages (1.8V), with smaller voltage swings (150mV), over shorter distances and with less power consumption.  SubLVDS is used by some of the Sony cameras. Any FPGA which can receive LVDS, can receive subLVDS by providing a smaller resistor across the receiving pair of wires. Ice40 FPGAs can support LVDS and subLVDS [5] with a few extra resistors.

Sub Low Voltage Signaling Embedded Clock (SLVS-EC) is a standard created by Sony, and adopted by Japan Industrial Imaging Association (JIIA). It embeds the clock in the pair of wires. Licensed IP for SLVS-EC is prov­ided by Xilinx, Altera, Lattice, Gowin, Microchip, OS Corporation (for Efinix) Macnica, FramOS, Mpression, Macnica, Todraw, CIS Corporation, and Gazogiken. You can read more about the SLVS-EC protocol here [3] and here [14]. It may be possible to write an Open Source version of SLVS-EC for the GateMate SerDes.

USB UVC transmits video and camera control over USB. USB is used for connecting multiple devices to a host computer. Before protocol overhead: USB 2 runs at speeds up to 480 Mbits/s.  USB 3 runs at speeds up to 5Gbits/s (Gen1x1), 10Gbit/s (Gen2x1, Gen1x2), 20Gbit/s (Gen2x2). USB-4 runs st speeds of  20/40/80 Gbits/s.  USB uses 8/10 bit encoding, so only four fifths of the bandwidth is available for data. USB has both a host interface and a device interface. FPGAs are well supported with the device interface, both with hard-core USB device cores, and by the well-known less-than $10 FTDI chips. The $23 EZ-USB™ FX5 enables a low cost FPGA to function as a USB host.

CameraLink by National Semiconductor sends camera data over LVDS.