Innovative video processing is best done on an FPGA.

10.1 Open Source FPGAs

The only Open Source FPGA with MIPI hard cares are the Lattice NX17/40 described below.

Lattice ICE 40 was the initial platform supported by Yosys. There are many open source circuit boards using Lattice FPGAs [4] ICE 40 UP adds large Block Rams, but they limit the frequency to 50Mhz. The Pico2-Ice is recommended for beginners.

Gowin is a Chinese FPGA manufacturer. Their Littlebe chips are now supported by the open source Yosys tool chain. Clearly they are the price leader in the FPGA market. But there is a very serious bug report [22] they have not responded to. The datasheet lacks critical information; how many resources does it take to build a mux4 or mux32? The github reporitories lack licensing information, putting our projects in legal limbo. Compared to Gowin, the European made FPGAs are subject to much better environmental and labor laws. Gernany even has labor union representatives on the company boards. If there is a supply disruption, or worse yet another war, good to have local suppliers. And our money should go towards improving European fabs, not asian ones. The money we spend in Europe, gets spent again in Europe, boosting our economies.

Lattice ECP5 allows for larger fabrics and faster clock frequencies than ICE40. ECP5 supports 1920*1080 DVI out @30FPS. The ULX3S ($145 - $235) is recommended. The $69 Ice Pi Zero will ship in early 2026. It has the Raspberry Pi Form Factor, so it can use the $10 Raspberry Pi Zero to connect to a wide range of MIPI cameras.

Lattice Nexus 17 and 40 add two 10Gbit/s MIPI CSI or DSI hard cores and large Block RAMs to the Lattice ECP 5 family. These are needed for some video applications such as fisheye lens dewarping.

CologneChip’s GateMate is the only low-cost Open Source European FPGA. Therefore this article pays great attention to it. GateMate is a very innovative 20€ FPGA, with a significant ecosystem [2] It is the only low end FPGA with SerDes. Instead of LUT-4s, it has 20,048 Cologne Programable Elements (CPEs). CPEs include 8 input LUT-2 trees and 4 input multiplexers. On Lattice FPGA’s with LUT-4s, it requires 3 LUT-4s to implement a 4 input multiplexer.

NanoXplore offers 3 radiation hardened FPGAs. NG-Mediam with 34,272 LUT-4s, ULTRA300 with 290 496LUT-4s, and NG-ULTRA with 536-928 LUT-4s. The NG-Ultra is Open Source.

Other FPGAs are increasingly being supported by Yosys and Nextpnr. There are experimental versions for Xilinx, Altera Cyclone V, Lattice MachXO2, and a "generic" back-end for user-defined architectures.




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