What? LiteX‑based M.2 2280 SDR board featuring a Xilinx Artix‑7 XC7A200T FPGA and an ADI AD9361 RFIC. Why? Open‑source gateware/software, up to 61.44 MSPS (122.88 MSPS†) over PCIe Gen2 ×4, hack‑friendly clocking & debug. Who? SDR tinkerers, FPGA devs, time‑sync enthusiats or anyone hitting the limits of other SDRs.
Built with the Forest WIki.
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